Plan 9 from Bell Labs’s /usr/web/sources/contrib/uriel/changes/2005/1118/1

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Distributed under the MIT License.
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Move realmode into link section.
Add Matrox mmio segment.
 [rsc] --rw-rw-r-- M 55859 glenda sys 1447 Nov 18 11:59 sys/src/9/pc/pcdisk
	/n/sourcesdump/2005/1118/plan9/sys/src/9/pc/pcdisk:33,38 - 
	/n/sourcesdump/2005/1119/plan9/sys/src/9/pc/pcdisk:33,39
	  	usb
	  
	  link
	+ 	realmode
	  	devpccard
	  	devi82365
	  	apm		apmjump
	/n/sourcesdump/2005/1118/plan9/sys/src/9/pc/pcdisk:60,66 - 
	/n/sourcesdump/2005/1119/plan9/sys/src/9/pc/pcdisk:61,66
	  	usbuhci
	  
	  misc
	- 	realmode
	  	archmp		mp apic
	  
	  	sdata		pci sdscsi
 [rsc] --rw-rw-r-- M 55859 glenda sys 4769 Nov 18 11:27 sys/src/9/pc/vgamga2164w.c
	/n/sourcesdump/2005/1118/plan9/sys/src/9/pc/vgamga2164w.c:58,68 - 
	/n/sourcesdump/2005/1119/plan9/sys/src/9/pc/vgamga2164w.c:58,70
	  		scr->mmio = vmap(p->mem[0].bar&~0x0F, p->mem[0].size);
	  		if(scr->mmio == nil)
	  			return;
	+ 		addvgaseg("mga2164wmmio", p->mem[0].bar&~0x0F, p->mem[0].size);
	  		vgalinearaddr(scr, p->mem[1].bar&~0x0F, 8*MB);
	  	}else{
	  		scr->mmio = vmap(p->mem[1].bar&~0x0F, p->mem[1].size);
	  		if(scr->mmio == nil)
	  			return;
	+ 		addvgaseg("mga2164wmmio", p->mem[1].bar&~0x0F, p->mem[1].size);
	  		vgalinearaddr(scr, p->mem[0].bar&~0x0F, 16*MB);
	  	}
	  	if(scr->paddr)
 [rsc] --rw-rw-r-- M 55859 glenda sys 1428 Nov 18 11:59 sys/src/9/pc/pc
	/n/sourcesdump/2005/1118/plan9/sys/src/9/pc/pc:36,44 - 
	/n/sourcesdump/2005/1119/plan9/sys/src/9/pc/pc:36,44
	  	tv
	  
	  link
	+ 	realmode
	  	devpccard
	  	devi82365
	- 	realmode
	  	ether2000	ether8390
	  	ether2114x	pci
	  	ether589	etherelnk3
 [rsc] --rw-rw-r-- M 55859 glenda sys 1447 Nov 18 11:59 sys/src/9/pc/pcdisk
 [rsc] --rw-rw-r-- M 55859 glenda sys 23864 Nov 18 14:17 sys/src/9/pc/mmu.c
	/n/sourcesdump/2005/1118/plan9/sys/src/9/pc/mmu.c:393,404 - 
	/n/sourcesdump/2005/1119/plan9/sys/src/9/pc/mmu.c:393,405
	  void
	  putmmu(ulong va, ulong pa, Page*)
	  {
	- 	int old;
	+ 	int old, s;
	  	Page *page;
	  
	  	if(up->mmupdb == nil)
	  		upallocpdb();
	  
	+ 	s = splhi();
	  	if(!(vpd[PDX(va)]&PTEVALID)){
	  		if(up->mmufree == 0)
	  			page = newpage(0, 0, 0);
	/n/sourcesdump/2005/1118/plan9/sys/src/9/pc/mmu.c:417,422 - 
	/n/sourcesdump/2005/1119/plan9/sys/src/9/pc/mmu.c:418,424
	  	vpt[VPTX(va)] = pa|PTEUSER|PTEVALID;
	  	if(old&PTEVALID)
	  		flushpg(va);
	+ 	splx(s);
	  }
	  
	  /*
	/n/sourcesdump/2005/1118/plan9/sys/src/9/pc/mmu.c:896,902 - 
	/n/sourcesdump/2005/1119/plan9/sys/src/9/pc/mmu.c:898,904
	  	
	  	va = (ulong)v;
	  	if(va < KZERO)
	- 		panic("paddr: va=%#.8lux", va);
	+ 		panic("paddr: va=%#.8lux pc=%#.8lux", va, getcallerpc(&va));
	  	return va-KZERO;
	  }
	  
	/n/sourcesdump/2005/1118/plan9/sys/src/9/pc/mmu.c:989,991 - 
	/n/sourcesdump/2005/1119/plan9/sys/src/9/pc/mmu.c:991,1036
	  	if(!print)
	  		iprint("%d pages in mach pdbpools\n", n);
	  }
	+ 
	+ void
	+ checkfault(ulong addr, ulong pc)
	+ {
	+ 	ulong *a;
	+ 	int i;
	+ 	
	+ 	print("user fault: addr=%.8lux pc=%.8lux\n", addr, pc);
	+ 	if(!(vpd[PDX(addr)]&PTEVALID))
	+ 		print("addr not mapped (vpd=%.8lux)\n", vpd[PDX(addr)]);
	+ 	else if(!(vpt[VPTX(addr)]&PTEVALID))
	+ 		print("addr not mapped (vpd=%.8lux vpt=%.8lux)\n",
	+ 			vpd[PDX(addr)], vpt[VPTX(addr)]);
	+ 	else
	+ 		print("addr mapped (vpd=%.8lux vpt=%.8lux)\n",
	+ 			vpd[PDX(addr)], vpt[VPTX(addr)]);
	+ 	
	+ 	if(!(vpd[PDX(pc)]&PTEVALID))
	+ 		print("pc not mapped (vpd=%.8lux)\n", vpd[PDX(pc)]);
	+ 	else if(!(vpt[VPTX(pc)]&PTEVALID))
	+ 		print("pc not mapped (vpd=%.8lux vpt=%.8lux)\n",
	+ 			vpd[PDX(pc)], vpt[VPTX(pc)]);
	+ 	else{
	+ 		print("pc mapped (vpd=%.8lux vpt=%.8lux)\n",
	+ 			vpd[PDX(pc)], vpt[VPTX(pc)]);
	+ 		if(PPN(pc) == PPN(pc+4))	/* not crossing into an unmapped page */
	+ 			print("*pc: %.8lux\n", *(ulong*)pc);
	+ 		a = (ulong*)PPN(pc);
	+ 		for(i=0; i<WD2PG; i++)
	+ 			if(a[i] != 0)
	+ 				break;
	+ 		if(i == WD2PG)
	+ 			print("pc's page is all zeros\n");
	+ 		else{
	+ 			for(i=0; i<256/4; i+=8){
	+ 				print("%.8lux: %.8lux %.8lux %.8lux %.8lux %.8lux %.8lux %.8lux %.8lux\n",
	+ 					PPN(pc)+i*4, a[i], a[i+1], a[i+2], a[i+3], 
	+ 					a[i+4], a[i+5], a[i+6], a[i+7]);
	+ 			}
	+ 		}
	+ 	}
	+ }
	+ 
 [rsc] --rw-rw-r-- M 55859 glenda sys 21278 Nov 18 14:18 sys/src/9/pc/trap.c
	/n/sourcesdump/2005/1118/plan9/sys/src/9/pc/trap.c:592,597 - 
	/n/sourcesdump/2005/1119/plan9/sys/src/9/pc/trap.c:592,598
	  }
	  
	  extern void checkpages(void);
	+ extern void checkfault(ulong, ulong);
	  static void
	  fault386(Ureg* ureg, void*)
	  {
	/n/sourcesdump/2005/1118/plan9/sys/src/9/pc/trap.c:623,628 - 
	/n/sourcesdump/2005/1119/plan9/sys/src/9/pc/trap.c:624,630
	  			panic("fault: 0x%lux\n", addr);
	  		}
	  		checkpages();
	+ 		checkfault(addr, ureg->pc);
	  		sprint(buf, "sys: trap: fault %s addr=0x%lux",
	  			read ? "read" : "write", addr);
	  		postnote(up, 1, buf, NDebug);


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