Plan 9 from Bell Labs’s /usr/web/sources/extra/9hist/pc/vgamga2164w.c

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Distributed under the MIT License.
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## diffname pc/vgamga2164w.c 1998/0325
## diff -e /dev/null /n/emeliedump/1998/0325/sys/src/brazil/pc/vgamga2164w.c
0a
#include "u.h"
#include "../port/lib.h"
#include "mem.h"
#include "dat.h"
#include "fns.h"
#include "io.h"
#include "../port/error.h"

#define	Image	IMAGE
#include <draw.h>
#include <memdraw.h>
#include "screen.h"

static void
mga2164wenable(VGAscr*)
{
	Pcidev *p;
	Physseg *s;
/*
	ulong mmio;
	uchar *rp;
	int i;
*/

	if((p = pcimatch(nil, 0x102B, 0x051B)) == nil)
		return;

	for(s = physseg; s->name; s++)
		if(strcmp("pcivctl", s->name) == 0)
			s->pa = p->mem[1].bar & ~0x0F;

/*
	mmio = p->mem[1].bar & ~0x0F;
	mmio = upamalloc(mmio, 16*1024, 0);
	if(mmio == 0){
		print("mmio == 0\n");
		return;
	}

	rp = (uchar*)(mmio+0x3C00);
	for(i = 0; i < 16; i++){
		print("%2.2uX ", *rp);
		rp++;
	}
	print("\n");
*/
}

static ulong
mga2164wlinear(VGAscr* scr, int* size, int* align)
{
	ulong aperture, oaperture;
	int oapsize, wasupamem;
	Pcidev *p;

	oaperture = scr->aperture;
	oapsize = scr->apsize;
	wasupamem = scr->isupamem;
	if(wasupamem)
		upafree(oaperture, oapsize);
	scr->isupamem = 0;

	if(p = pcimatch(nil, 0x102B, 0x051B)){
		aperture = p->mem[0].bar & ~0x0F;
		*size = p->mem[0].size;
	}
	else
		aperture = 0;

	aperture = upamalloc(aperture, *size, *align);
	if(aperture == 0){
		if(wasupamem && upamalloc(oaperture, oapsize, 0))
			scr->isupamem = 1;
	}
	else
		scr->isupamem = 1;

	return aperture;
}

VGAdev vgamga2164wdev = {
	"mga2164w",

	mga2164wenable,			/* enable */
	0,				/* disable */
	0,				/* page */
	mga2164wlinear,			/* linear */
};
.
## diffname pc/vgamga2164w.c 1998/0326
## diff -e /n/emeliedump/1998/0325/sys/src/brazil/pc/vgamga2164w.c /n/emeliedump/1998/0326/sys/src/brazil/pc/vgamga2164w.c
87a
};

VGAcur vgamga2164wcur = {
	"mga2164whwgc",

	tvp3026enable,
	tvp3026disable,
	tvp3026load,
	tvp3026move,
.
80a
enum {
	Index		= 0x00,		/* Index */
	Data		= 0x0A,		/* Data */

	CaddrW		= 0x04,		/* Colour Write Address */
	Cdata		= 0x05,		/* Colour Data */

	Cctl		= 0x09,		/* Direct Cursor Control */
	Cram		= 0x0B,		/* Cursor Ram Data */
	Cxlsb		= 0x0C,		/* Cursor X LSB */
	Cxmsb		= 0x0D,		/* Cursor X MSB */
	Cylsb		= 0x0E,		/* Cursor Y LSB */
	Cymsb		= 0x0F,		/* Cursor Y MSB */

	Icctl		= 0x06,		/* Indirect Cursor Control */
};

static void
tvp3026disable(VGAscr* scr)
{
	uchar *tvp3026;

	if(scr->storage == 0)
		return;
	tvp3026 = KADDR(scr->storage+0x3C00);

	/*
	 * Make sure cursor is off
	 * and direct control enabled.
	 */
	*(tvp3026+Index) = Icctl;
	*(tvp3026+Data) = 0x90;
	*(tvp3026+Cctl) = 0x00;
}

static void
tvp3026load(VGAscr* scr, Cursor* curs)
{
	int x, y;
	uchar *tvp3026;

	if(scr->storage == 0)
		return;
	tvp3026 = KADDR(scr->storage+0x3C00);

	/*
	 * Make sure cursor is off by initialising the cursor
	 * control to defaults.
	 * Write to the indirect control register to make sure
	 * direct register is enabled and upper 2 bits of cursor
	 * RAM address are 0.
	 * The LSBs of the cursor RAM address are in PaddrW.
	 */
	tvp3026disable(scr);
	vgao(PaddrW, 0x00);

	/*
	 * Initialise the 64x64 cursor RAM array. There are 2 planes,
	 * p0 and p1. Data is written 8 pixels per byte, with p0 in the
	 * first 512 bytes of the array and p1 in the second.
	 * The cursor is set in 3-colour mode which gives the following
	 * truth table:
	 *	p1 p0	colour
	 *	 0  0	transparent
	 *	 0  1	cursor colour 0
	 *	 1  0	cursor colour 1
	 *	 1  1	cursor colour 2
	 * Put the cursor into the top-left of the 64x64 array.
	 * The 0,0 cursor point is bottom-right, so positioning will
	 * have to take that into account.
	 */
	for(y = 0; y < 64; y++){
		for(x = 0; x < 64/8; x++){
			if(x < 16/8 && y < 16)
				*(tvp3026+Cram) = curs->clr[x+y*2];
			else
				*(tvp3026+Cram) = 0x00;
		}
	}
	for(y = 0; y < 64; y++){
		for(x = 0; x < 64/8; x++){
			if(x < 16/8 && y < 16)
				*(tvp3026+Cram) = curs->set[x+y*2];
			else
				*(tvp3026+Cram) = 0x00;
		}
	}

	/*
	 * Initialise the cursor hotpoint
	 * and enable the cursor in 3-colour mode.
	 */
	scr->offset.x = 64+curs->offset.x;
	scr->offset.y = 64+curs->offset.y;
	*(tvp3026+Cctl) = 0x01;
}

static int
tvp3026move(VGAscr* scr, Point p)
{
	int x, y;
	uchar *tvp3026;

	if(scr->storage == 0)
		return 1;
	tvp3026 = KADDR(scr->storage+0x3C00);

	x = p.x+scr->offset.x;
	y = p.y+scr->offset.y;

	*(tvp3026+Cxlsb) = x & 0xFF;
	*(tvp3026+Cxmsb) = (x>>8) & 0x0F;
	*(tvp3026+Cylsb) = y & 0xFF;
	*(tvp3026+Cymsb) = (y>>8) & 0x0F;

	return 0;
}

static void
tvp3026enable(VGAscr* scr)
{
	int i;
	uchar *tvp3026;

	if(scr->storage == 0)
		return;
	tvp3026 = KADDR(scr->storage+0x3C00);

	tvp3026disable(scr);

	/*
	 * Overscan colour,
	 * cursor colour 1 (white),
	 * cursor colour 2, 3 (black).
	 */
	*(tvp3026+CaddrW) = 0x00;
	for(i = 0; i < 6; i++)
		*(tvp3026+Cdata) = Pwhite; 
	for(i = 0; i < 6; i++)
		*(tvp3026+Cdata) = Pblack; 

	/*
	 * Load, locate and enable the
	 * 64x64 cursor in 3-colour mode.
	 */
	tvp3026load(scr, &arrow);
	tvp3026move(scr, ZP);
	*(tvp3026+Cctl) = 0x01;
}

.
40,46c
	memset(&seg, 0, sizeof(seg));
	seg.attr = SG_PHYSICAL;
	seg.name = smalloc(NAMELEN);
	snprint(seg.name, NAMELEN, "mga2164wmmio");
	seg.pa = scr->storage;
	seg.size = p->mem[1].size;
	addphysseg(&seg);

	scr->storage = (ulong)KADDR(scr->storage);
.
38d
28,36c
	scr->storage = upamalloc(p->mem[1].bar & ~0x0F, p->mem[1].size, 0);
	if(scr->storage == 0)
.
24a
	/*
	 * Only once, can't be disabled for now.
	 * scr->storage holds the virtual address of
	 * the MMIO registers, this is different
	 * usage from other VGA drivers.
	 */
	if(scr->storage)
		return;

.
18,23c
	Physseg seg;
.
15c
mga2164wenable(VGAscr* scr)
.
13a
/*
 * Matrox Millenium II.
 * MGA-2164W 3D graphics accelerator + Tvp3026 RAMDAC.
 */
.
## diffname pc/vgamga2164w.c 1998/0401
## diff -e /n/emeliedump/1998/0326/sys/src/brazil/pc/vgamga2164w.c /n/emeliedump/1998/0401/sys/src/brazil/pc/vgamga2164w.c
137c
	*(tvp3026+Index) = 0;
.
134c
	 * Put 0 in index register for lower 8 bits of cursor RAM address.
.
## diffname pc/vgamga2164w.c 1998/0422
## diff -e /n/emeliedump/1998/0401/sys/src/brazil/pc/vgamga2164w.c /n/emeliedump/1998/0422/sys/src/brazil/pc/vgamga2164w.c
33c
	p = pcimatch(nil, 0x102B, 0x051B);
	if(p == nil)
.
## diffname pc/vgamga2164w.c 1998/0506
## diff -e /n/emeliedump/1998/0422/sys/src/brazil/pc/vgamga2164w.c /n/emeliedump/1998/0506/sys/src/brazil/pc/vgamga2164w.c
34,35c
	if(p == nil) {
		p = pcimatch(nil, 0x102B, 0x051F);
		if(p == nil)
			return;
	}
.
## diffname pc/vgamga2164w.c 1998/0507
## diff -e /n/emeliedump/1998/0506/sys/src/brazil/pc/vgamga2164w.c /n/emeliedump/1998/0507/sys/src/brazil/pc/vgamga2164w.c
213c
	tvp3026 = KADDR(scr->io+0x3C00);
.
211c
	if(scr->io == 0)
.
192c
	tvp3026 = KADDR(scr->io+0x3C00);
.
190c
	if(scr->io == 0)
.
130c
	tvp3026 = KADDR(scr->io+0x3C00);
.
128c
	if(scr->io == 0)
.
111c
	tvp3026 = KADDR(scr->io+0x3C00);
.
109c
	if(scr->io == 0)
.
86a
static void
mga2164wenable(VGAscr* scr)
{
	Pcidev *p;
	Physseg seg;
	int size, align, immio;
	ulong aperture;

	/*
	 * Only once, can't be disabled for now.
	 * scr->io holds the virtual address of
	 * the MMIO registers.
	 */
	if(scr->io)
		return;

	p = mgapcimatch();
	if(p == nil)
		return;

	immio = p->did==MGA2064? 0 : 1;
	scr->io = upamalloc(p->mem[immio].bar & ~0x0F, p->mem[immio].size, 0);
	if(scr->io == 0)
		return;

	memset(&seg, 0, sizeof(seg));
	seg.attr = SG_PHYSICAL;
	seg.name = smalloc(NAMELEN);
	snprint(seg.name, NAMELEN, "mga2164wmmio");
	seg.pa = scr->io;
	seg.size = p->mem[immio].size;
	addphysseg(&seg);

	scr->io = (ulong)KADDR(scr->io);

	/* need to map frame buffer here too, so vga can find memory size */
	size = 16*1024*1024;
	align = 0;
	aperture = mga2164wlinear(scr, &size, &align);
	if(aperture) {
		scr->aperture = aperture;
		scr->apsize = size;
		memset(&seg, 0, sizeof(seg));
		seg.attr = SG_PHYSICAL;
		seg.name = smalloc(NAMELEN);
		snprint(seg.name, NAMELEN, "mga2164wscreen");
		seg.pa = aperture;
		seg.size = size;
		addphysseg(&seg);
	}
}

.
79a
		}
		else
			scr->isupamem = 0;
.
78c
		if(wasupamem && upamalloc(oaperture, oapsize, 0)) {
			aperture = oaperture;
.
75a
	if(wasupamem) {
		if(oaperture == aperture)
			return oaperture;
		upafree(oaperture, oapsize);
	}
	scr->isupamem = 0;

.
69,71c
	if(p = mgapcimatch()){
		aperture = p->mem[p->did==MGA2064? 1 : 0].bar & ~0x0F;
		*size = 16*1024*1024;
.
65,67d
39,52c
	return p;
.
37c
			p = pcimatch(nil, MATROX, MGA2064);
.
35c
		p = pcimatch(nil, MATROX, MGA2164);
.
24,33c
	p = pcimatch(nil, MATROX, MGA2164AGP);
.
22d
18,19c

enum {
	/* pci chip manufacturer */
	MATROX		= 0x102B,

	/* pci chip device ids */
	MGA2064		= 0x0519,
	MGA2164		= 0x051B,
	MGA2164AGP	= 0x051F
};

static Pcidev*
mgapcimatch(void)
.
15,16c
 * Matrox Millenium and Matrox Millenium II.
 * Matrox MGA-2064W, MGA-2164W 3D graphics accelerators
 * Texas Instruments Tvp3026 RAMDAC.
.
## diffname pc/vgamga2164w.c 1998/0508
## diff -e /n/emeliedump/1998/0507/sys/src/brazil/pc/vgamga2164w.c /n/emeliedump/1998/0508/sys/src/brazil/pc/vgamga2164w.c
15,16c
 * Matrox Millennium and Matrox Millennium II.
 * Matrox MGA-2064W, MGA-2164W 3D graphics accelerators.
.
## diffname pc/vgamga2164w.c 1998/0509
## diff -e /n/emeliedump/1998/0508/sys/src/brazil/pc/vgamga2164w.c /n/emeliedump/1998/0509/sys/src/brazil/pc/vgamga2164w.c
120c
	size = (p->did==MGA2064? 8 :16)*1024*1024;
.
57c
		*size = (p->did==MGA2064? 8 :16)*1024*1024;
.
## diffname pc/vgamga2164w.c 1999/0119
## diff -e /n/emeliedump/1998/0509/sys/src/brazil/pc/vgamga2164w.c /n/emeliedump/1999/0119/sys/src/brazil/pc/vgamga2164w.c
11a
#include <cursor.h>
.
## diffname pc/vgamga2164w.c 2001/0527
## diff -e /n/emeliedump/1999/0119/sys/src/brazil/pc/vgamga2164w.c /n/emeliedump/2001/0527/sys/src/9/pc/vgamga2164w.c
129,130c
		kstrdup(&seg.name, "mga2164wscreen");
.
112,113c
	kstrdup(&seg.name, "mga2164wmmio");
.
## diffname pc/vgamga2164w.c 2001/0908
## diff -e /n/emeliedump/2001/0527/sys/src/9/pc/vgamga2164w.c /n/emeliedump/2001/0908/sys/src/9/pc/vgamga2164w.c
126,131c
		addvgaseg("mga2164wscreen", aperture, size);
.
110,116d
108a
	addvgaseg("mga2164wmmio", scr->io, p->mem[immio].size);
.
89d

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